The present invention relates to a semiconductor device and, more particularly, to an input protective semiconductor device of a complementary metal oxide semiconductor (CMOS) integrated circuit.
A semiconductor device, especially, a CMOS integrated circuit may operate erroneously or be broken due to an abnormal input such as static electricity, resulting in undesirable phenomena. In order to prevent the undesirable phenomena, a protective circuit is generally arranged in an input stage of the semiconductor integrated circuit. However, most of the conventional input protective circuits mainly serve to prevent electrostatic breakdown of the CMOS. Therefore, the protective circuits cannot sufficiently prevent the erroneous operation and the local damage which may occur prior to the electrostatic breakdown.
An abnormal input voltage applied to the integrated circuit from the outside has a positive or negative voltage polarity. However, the conventional protective circuit only protects the semiconductor integrated circuit from the abnormal input voltage of either polarity. For example, in an input protective circuit for protecting the semiconductor integrated circuit from a positive voltage, the semiconductor integrated circuit cannot be sufficiently protected from an abnormal negative voltage in a required manner. Thus, the conventional protective circuits cannot protect the semiconductor integrated circuit from both the negative and positive voltages.